CACHECTL(2)							   CACHECTL(2)

NAME    [Toc]    [Back]

     cachectl -	mark pages cacheable or	uncacheable

SYNOPSIS    [Toc]    [Back]

     #include <sys/cachectl.h>

     int cachectl (void	*addr, int nbytes, int op);

DESCRIPTION    [Toc]    [Back]

     The cachectl system call allows a process to make ranges of its address
     space cacheable or	uncacheable.  Initially, a process's entire address
     space is cacheable.

     The op parameter may be one of:

     CACHEABLE	      Make the indicated pages cacheable

     UNCACHEABLE      Make the indicated pages uncacheable

     The CACHEABLE and UNCACHEABLE op's	affect the address range indicated by
     addr and nbytes.  addr must be page aligned and nbytes must be a multiple
     of	the page size.

     Changing a	page from UNCACHEABLE state to CACHEABLE state will cause both
     the instruction and data caches to	be flushed if necessary	to avoid stale
     cache information.

     On	Power Indigo2, Indigo2 10000 and Power Challenge M systems, user
     programs are not allowed uncached access to main memory, so requesting
     this will fail with EINVAL.

     On	systems	with hardware coherent caches, cachectl	will complete
     successfully, but not actually allow memory to be accessed	uncached.

RETURN VALUE    [Toc]    [Back]

     cachectl returns 0	when no	errors are detected.  If errors	are detected,
     cachectl returns -1 with the error	cause indicated	in errno.

ERRORS    [Toc]    [Back]

     [EINVAL]	      The op parameter is not one of CACHEABLE or UNCACHEABLE,
		      or is UNCACHEABLE	on a Power Indigo2, Indigo2 10000 or
		      Power Challenge M.

     [EINVAL]	      The addr parameter is not	page aligned, or nbytes	is not
		      a	multiple of the	page size.

     [EFAULT]	      Some or all of the address range addr to (addr+nbytes-1)
		      is not accessible.







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CACHECTL(2)							   CACHECTL(2)



SEE ALSO
     cacheflush(2)


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